Today's networking components process numerous different flows (e.g. groups of packets originating from a common source) for implementing high-performance networking. As time progresses, the speed at which networking traffic flows increases, and accordingly the rate at which networking traffic may be processed should increase. In some cases, an integrated networking functions operation might be processed in batches (e.g. by storing the packets of a flow, and later processing the stored packets), and in other cases it is desirable to process the integrated networking functions operation at wire speed.
As the demand for higher throughput of traffic flow increases, networking or communication systems are often scaled to include multiple processing systems or units, such as multiple network processors, in a single networking or communication system. Various data or information may be formed into one or more packets or datagrams to be transmitted across the physical boundaries of one processing system or unit to another processing system or unit via a plurality of communication channels. These communication channels transmitting or receiving data or information to or from another processing system or unit nevertheless may correspond to different datapath widths.
Therefore, there is a need for handling data flow with multiple datapath widths. Moreover, there is also a need for handling data flow with multiple datapath widths in a multi-chip environment with an interchip interface module that interconnects one processing system or unit (hereinafter processing system) to another processing system.